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Add to Calendar 4/11/2016 11:00 am 4/11/2016 America/Chicago Physics Careers Seminar: "Job Opportunities at Intel" DESCRIPTION:

Please join Dr. Zhengguang Wang and Dr. Walid Havez as they will discuss Intel’s development of advancement of Silicon process technology and how they brought advanced technologies to High Volume Manufacturing years ahead of its competitors. As we look to 2016 and beyond, Intel will continue its investment in inventing and developing new technologies and how we need smart PhDs to help us get there.

Bios: Walid Hafez joined Intel’s Portland Technology Development organization in 2005 after earning his MS and PhD in Electrical Engineering from UIUC. He has developed front-end processes for Intel’s 65nm, 45nm, 32nm, 22nm, and 14nm system-on-a-chip (SoC) nodes, and is currently a process integration manager for the 7nm SoC technology.

Mike Wang joined Intel’s D1D Ramp organization in 2004 as a senior process engineer after earning his MS and PhD in Chemical Engineering from UIUC. He became a Thin Films Dielectrics group leader in 2006 and Thin Films Department Manager in 2015.

\n\nSPEAKER:

Dr. Zhengguang Wang and Dr. Walid Havez, Intel Corp.

276 Loomis

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Physics Careers Seminar: "Job Opportunities at Intel"

Speaker Dr. Zhengguang Wang and Dr. Walid Havez, Intel Corp.
Date: 4/11/2016
Time: 11 a.m.
Location:

276 Loomis

Event Contact: Lance Cooper
Sponsor:

Dept. of Physics

Event Type: Alumni Speaker Seminar
 

Please join Dr. Zhengguang Wang and Dr. Walid Havez as they will discuss Intel’s development of advancement of Silicon process technology and how they brought advanced technologies to High Volume Manufacturing years ahead of its competitors. As we look to 2016 and beyond, Intel will continue its investment in inventing and developing new technologies and how we need smart PhDs to help us get there.

Bios: Walid Hafez joined Intel’s Portland Technology Development organization in 2005 after earning his MS and PhD in Electrical Engineering from UIUC. He has developed front-end processes for Intel’s 65nm, 45nm, 32nm, 22nm, and 14nm system-on-a-chip (SoC) nodes, and is currently a process integration manager for the 7nm SoC technology.

Mike Wang joined Intel’s D1D Ramp organization in 2004 as a senior process engineer after earning his MS and PhD in Chemical Engineering from UIUC. He became a Thin Films Dielectrics group leader in 2006 and Thin Films Department Manager in 2015.

To request disability-related accommodations for this event, please contact the person listed above, or the unit hosting the event.

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